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acpm-7886 td-scdma power ampli?er data sheet general description the acpm-7886 is an ampli?er module designed for td-scdma applications in the 2010-2025mhz band. de- signed around avago technologies gaas enhancement mode phemt process, the acpm-7886 o?ers premium performance in a very small form factor. it is matched to 50 ohms on the input and output. the ampli?er has excellent aclr and e?ciency perfor- mance at max pout and low quiescent current (50ma) with a single bias control voltage, vctrl = 2.0v. designed in a surface mount rf package, the acpm-7886 is very cost and size competitive. functional block diagram features operating frequency: 2010 - 2025 mhz 28 dbm linear output power @ 3.5v high e?ciency 41% pae single bias, low quiescent current (50ma) internal 50 ohm matching networks for both rf input & output 3.2 - 4.2 v linear operation 4.0 x 4.0mm smt package low package pro?le, 1.1mm applications td-scdma handsets td-scdma data cards td-scdma pdas rf in (2) rf out (8) vdd3 (10) vdd1 (1) vdd2 (5) vctrl (4) gnd (3,6,7,9) output match bias control mmic module
2 package diagram pin description table pin no. pin label description function 1 vdd1 supply bias 1 st and 2 nd stages drain bias, nominally 3.5v 2 rfin rf input signal input, internally grounded through inductor. external dc block needed if dc voltage present on input trace. 3 n/c no internal connection recommend ground connection on pcb 4vctrlcontrol voltage output level control, nominally 2v 5 vdd2 supply bias bias circuit supply, > 2.5v; nominally 2.85v. does not require a regulated input and can be connected directly to the battery, if desired. 6 gnd ground 7 gnd ground 8 rfout rf output signal output, requires external dc block 9 gnd ground 10 vdd3 supply bias 3 rd stage drain bias, nominally 3.5v marking notes : row 3: ml = manufacturing location y = year ww = work week dd = date code row 4: xxxx = trace c ode (avago technologies internal reference) avago acpm-7886 mlywwdd xxxx vdd1 (pin 1) rfin n/c (gnd) vctrl vdd2 (pin 5) gnd gnd gnd (pin 6) rfout vdd3 (pin 10) 4mm sq 1.175mm bottom view max
3 maximum ratings table parameter min. max. supply voltage, vdd1 and vdd3 5.0 v supply voltage, vdd2 -1 v 5.0 v analog control voltage -1 v 3.0 v rf input power +5 dbm operating case temperature +90 c load vswr 12:1 storage temperature (case temperature) -30 c +100 c notes: 1. operation of this device in excess of any of these limits may cause permanent damage. 2. avoid electrostatic discharge on i/o pins recommended operating conditions parameter min. typ. max. supply voltage, vdd1 and vdd3 1.0 v 3.5 v 4.5 v supply voltage, vdd2 2.6 v 2.85 v 4.5 v control voltage 1.9 v 2.0 v 2.1 v case temperature -20 c +85 c package dimensions 4.00 3.80 0.4 0.6 0.5 4.0 0.1 3.60 2.0 0.4 0.45 0.1 0.5 0.4 0.5
4 electrical characteristics of td-scdma pa unless otherwise speci?ed: f=2010-2025mhz, vdd1=vdd3=3.5v, vdd2=2.85v, vctrl=2.0v, pout=28.0dbm, ta=25 c, zin/zout = 50 parameter min typ max units leakage current, idd1,2,3; vctrl=0 v, rf o? 20 80 ua control current, ictrl; vctrl=2.0 v 75 110 145 ua bias current, idd2; vctrl=2 v, vdd2=2.85 v 6 10 ma quiescent current, idd1,3; rf o? vctrl=2.0 v 50 80 ma at pout=28.0dbm supply current idd1+idd3 435 480 ma pae including vdd1,2,3 36 41 % gain 25.5 28.5 32 db input vswr 1.1 2.0:1 - aclr 1.6mhz o?set -40 -35 dbc/1.28mhz 3.2mhz o?set -54 -48 dbc/1.28mhz 2nd harmonic -50 -40 dbc/1mhz 3rd harmonic -60 -45 dbc/1mhz noise figure 3.1 4.1 db stability, no spurious under conditions: vswr=4:1, all phases 3 5 figure 1. transmit o? power. transmitter o? power dynamic range: 107db transmitt o? power: -83dbm signal studio con?guration figure 2 td-scdma signal con?guration.
6 esd sensitivity level human body model (eia/jesd22-a114b): class 1a (250vmin, less than 500v) machine model (eia/jesd22-a115a): class a (50vmin, less than 200v) notes: esd sensitivity level for human body model and machine model necessitate the following handling precautions: 1. ensure faraday cage or conductive shield bag is used during transportation processes. 2. if the static charge at smt assemble station is above the device sensitivity level, place an ionizer near to the device for charge neu- tralization purposes. 3. personal grounding must be worn at all times when handling the devices. tape dimensions and orientation ? 1.55 0.05 ? 1.50 (min) 4.38 0.10 1.80 0.10 4.38 0.10 c l 8.00 0.10 4.38 0.10 2.00 0.05 [1] 4.00 0.10 [2] 5.50 0.05 [3] 12.00 0.30 1.75 0.10 0.30 0.05 notes: 1. measured from centerline of sprocket hole to centerline of pocket 2. cumulative tolerance of 10 sprocket holes is 0.2 mm 3. all dimensions in millimeters unless otherwise stated. agilent acpm-7886 mlywwdd xxxx moisture sensitivity classi?cation: class 3 preconditioning per jesd22-a113-d class 3 was per- formed on all devices prior to reliability testing. acpm-7886 is a moisture sensitive component. its im- portant that the parts are handled under precaution and a proper manner. the handling, baking and out-of-pack storage conditions of the moisture sensitive components are described in ipc/jedc s-std-033a. avago tech- nologies recommends utilizing the standard precautions listed below. 1. calculated shelf life in sealed bag: 12 months at < 40c and < 90% relative humidity (rh) 2. peak package body temperature: 250c 3. after bag is opened, devices that will be subjected to re?ow solder of other high temperature process must be: a. mounted within 168 hours of factory condition 30c / 60% rh b. stored at <10% rh if not used 4. devices require baking, before mounting if: a. humidity indicator card is > 10% when read at 23 5c immediately after moisture barrier bag is opened. b. items 3a or 3b is not met 5. if baking is required, please refer to j-std-033 stan- dard for low temperature (40c) baking requirement in tape/reel form.
7 reel dimensions and orientation order information part number no. of devices container acpm-7886-blk 100 bulk acpm-7886-tr1 1000 7 tape and reel notes: 1. reel shall be labeled with the following information (as a minimum). 2. a certificate of compliance shall be issued and accompany each shipment of product. 3. reel must not be made with or contain ozone depleting materials. 4. all dimensions in millimeters (mm). a. manufacturers name or symbol b. avago technologies part number c. purchase order number d. date code e. quantity of units 50 min. 12.4 +2.0 -0.0 18.4 max. 25 min wide (ref) slot for carrier tape insertion for attachment to reel hub (2 places 180 apart) back view front view 178 shading indicates thru slots +0.4 -0.2 21.0 0.8 13.0 0.2 1.5 min. user feed direction cover tape carrier tape reel
8 solder re?ow pro?le the most commonly used solder re?ow method is ac- complished in a belt furnace using convection heat trans- fer. this pro?le is designed to ensure reliable ?nished joints. however, the pro?le indicated will vary among di?erent solder pastes from di?erent manufacturers and is shown here for reference only. other factors that can a?ect the pro?le include the density and types of components on the board, type of solder used and type of board or substrate material being used. the pro?le shows the actual temperature that should occur on the surface of a test board at or near the central of the solder joint. for this type of re?ow soldering, the circuit board and solder joints are ?rst to get heated up. the components on the board are then suggested board implementation notes: 1. all decoupling capacitors should be placed as close to the power module as possible. 2. rfin (pin 2) has a grounded inductor inside package as a matching element. an external series capacitor is needed if a dc v oltage is present. 3. an additional battery bypass capacitor should be placed on bias line before the battery terminal, but does not need to be im mediately adja- cent to the pa module. the bypass capacitor should be a large value, nominally between 2.2uf and 4.7uf. 4. trace impedance on rf lines should be 50 . c5 (10,000pf) c1 (4700pf) c2 (4700pf) c4 (33pf) c3 (33pf) gnd heated by conduction. the circuit board, because it has a large surface area, absorbs thermal energy e?ciently and distributes this heat to the components. re?ow temperature pro?les designed for tin/lead alloys will need to be revised accordingly to cater for the melting point of the lead free solder being 34c (54f) higher than that of tin/lead eutectic or near-eutectic alloys. in addition, the surface tension of molten lead free solder alloys is signi?cantly higher than the surface tension for tin/lead alloys and this can reduce the spread of lead free solder during re?ow. 250 200 150 100 melting point = 218c suggested lead free re?ow pro?le for snagcu solder paste 0 50 100 150 200 250 seconds ramp 1 preheat ramp 2 re?ow cooling 50 peak = 250 5c
9 lead free re?ow pro?le general guidelines i. ramp 1 ramp to 100c. maximum slope for this zone is limited to 2c/sec. faster heating with ramp higher than 2c may result in excessive solder balling and slump. ii. preheat preheat setting should range from 100 to 150c over a period of 60 to 120 seconds depending on the charac- teristics of the pcb components and the thermal charac- teristics of the oven. if possible, do not prolong preheat as it will cause excessive oxidation to occur to the solder powder surface. iii. ramp 2 the time in this zone should be kept below 35 seconds to reduce the risk of ?ux exhaustion. the ramp up rate should be 2c/sec from 150c to re-?ow at 217c. it is important that the ?ux medium retains its activity during this phase to ensure the complete coalescence of the solder particles during re-?ow. iv. re?ow the peak re?ow temperature is calculated by adding ~32c to the melting point of the alloy. lead free solder paste melts at 218c and peak re?ow temperature is 218c + 32c = 250c (5c). note that total time over 218c is critical and should typically be 60 C 150 seconds. this period determines the appearance of the solder joints. excessive time above re?ow may cause a dull ?nish and charred of ?ux residues. insu?cient time above re?ow may lead to poor wetting and improperly fused (cloudy) ?ux residues. figure 3. pcb land pattern figure 4. stencil outline drawing figure 5. combined pcb and stencil layouts v. cooling maximum slope for cooling is limited to 3c/sec. more rapid cooling may cause solder joints crack while cooling at a slower rate will increase the likelihood of a crystalline appearance on the solder joints (dull ?nish). pcb design guidelines the recommended acpm-7886 pcb land pattern is shown in figure 3. the substrate is coated with solder mask between the i/o and conductive paddle to protect the gold pads from short circuit that is caused by solder bleeding / bridging. stencil design guidelines a properly designed solder screen or stencil is required to ensure optimum amount of solder paste is deposited onto the pcb pads. the recommended stencil layout is shown in figure 4. the stencil has a solder paste deposi- tion opening that is approximately 80% of the pcb pad. reducing the stencil opening can potentially generate more voids. on the other hand, stencil openings larger than 100% will lead to excessive solder paste smear or bridging across the i/o pads or conductive paddle to adjacent i/o pads. considering the fact that solder paste thickness will directly a?ect the quality of the solder joint, a good choice is to use laser cut stencil composed of 0.100mm (4 mils) or 0.127mm (5 mils) thick stainless steel which is capable of producing the required ?ne stencil outline. the combined pcb and stencil layout is shown in figure 5. (dimensions in mm) 2.1 0.85 (pitch) 0.375 0.55 0.3 0.55 0.375 1.68 0.44 0.64 0.64 0.44 0.85 3.12 0.41 2.1 1.68 0.55 stencil opening 0.44 0.55 0.44 3.9 3.12 3.9
10 figure 6. td-scdma frame. [1] solder paste recommendation the acpm-7886 package is a lead free package that was proven to pass msl3 when re?owed under lead free solder re?ow pro?le. the recommended lead free solder for smt re?ow is sn-ag-cu (95.5% tin, 3.8% silver, 0.7% copper) or other similar sn-ag-cu solders. this lead free solder paste has a melting point of 218c (423f), the ternary eutectic of sn-ag-cu system, giving it the advantage of being the lowest melting lead free alterna- tive. this temperature is still low enough to protect from damaging the internal circuitry during solder re?ow operations provided the exposure time at peak re?ow temperatures is not too excessive. in certain situations, the designer may use leaded solder paste for re?ow. the recommended solder for mounting acpm-7886 package is sn63 (63% sn, 37% pb). it is a eutectic compound with a typical melting point of 183c. application information introduction the acpm-7886 ampli?er module is designed for td- scdma applications in the 2010-2025mhz band. this power ampli?er is able to produce excellent results for the emerging chinese standard, td-scdma. typical aclr performance at vdd is 41dbc with pout of 28dbm and 41% e?ciency. background in 1999 the china academy of telecommunications tech- nology (catt) and siemens proposed a new 3g standard that would rival wcdma and cdma2000 data rates. time domain synchronous code domain access (td-scdma) combines both cdma and tdma technologies. it ben- e?ts from cdma capacity as well as being compatible with current gsm networks. but unlike existing wcdma, cdma2000 and gsm networks, this new standard trans- mits and receives on the same frequency thus greatly increasing spectrum e?ciency. figure 6 simpli?es this explanation by showing one td-scdma frame with 7 slots and 16 channelization codes in each slot. acpm-7886 test setup the test setup for measuring a td-scdma power module resembles a gsm test. speci?cally, it is very important to properly con?gure the timing for the test instruments and the device under test. in gsm, in order to turn on and off each time slot, a controlled pin on the pa is trig- gered with a pulse period of 4.615ms and a 12% duty cycle (577us). this pin is usually labeled as vapc on most gsm pas.
11 rfin rfout dut isolator attenuator 20db vctrl vdd2 vdd3 vdd1 10mhz out 10mhz in event1 trig in out out trig in gpib td-scdma uses the same control technique except that each frame is 5ms with only 7 timeslots and an additional 75us downlink pilot and a 125us uplink pilot. each of the 7 slots is 675us. for the acpm-7886, the vctrl pin is used instead of vapc. as in gsm, there is a time mask speci?- cation that must be met, but conformance to this spec is dictated by the vapc ramp. in addition to time domain specs, td-scdma must meet linearity requirement. gsm/gmsk is referred to as constant amplitude or constant envelope modulation, and thus the pam is allowed to operate in saturation. as shown in figure 6, each time slot supports 16 di?er- ent cdma codes with qpsk modulation; as a result this pa must meet similar aclr speci?cations as cdma or wcdma. signaling setup to properly test a td-scdma pa module as speci?ed in the ts25.102 standard, one must generate the rf signal shown in figure 6 along with the timing described in the previous section. while at the time of publication of this application note, agilent technologies did not have a td-scdma trans- ceiver or a baseband reference module capable of this signal generation, but it does have the e4438c capable of generating a td-scdma waveform. if used in conjunc- tion with agilent technologies e4440a spectrum analyzer and tsm signal studio, all performance tests become much simpler although, aclr, gain, pae, idd and spuri- ous emission, etc. can be measured with any spectrum analyzer. figure 7 shows the basic setup used to test acpm-7886 for td-scdma. this includes dc power supply, timing and rf signaling. in brief, the signal generator triggers the pulse generator which in turn triggers the spectrum analyzer and the acpm-7886 and any other multimeters used. the rf signal is created using signal studio on a pc and downloaded to the signal generator via gpib. signal studio [2] facilitates the construction of the complex rf waveform shown in figure 8. using this software, one can generate uplink and downlink dedi- cated physical channel (dpch) signals along with the uplink and downlink pilot signals. all 7 tra?c timeslots are supported, with up to 16 individually con?gurable code channels per timeslot, for a total of 112 resource units(ru). signal studio for tsm and other standards can be found at: www.agilent.com/?nd/signalstudio figure 8 displays the main con?guration window with only 1 downlink timeslot turned on. figure 7. td-scdma test setup.
12 technically the mobile will transmit on the uplink, but the main point is to display the con?gurability for each slot. in fact, the test for acpm-7886 does not require the full 16 code channels. signal studio is most bene?cial for a base station uplink or downlink test where multiple users will be transmit- ting on the same time slot. for this test only one time slot is used with a single code. figure 8. signal studio con?guration.
13 figure 9. transmit o? power. results acpm-7886 delivers good performance for td-scdma in the 2010 C 2025mhz frequency band see ?gures 10, 11, and 12. at vdd of 3.5v, vdd2 of 2.85 and vcntl of 2v and pout of 28dbm this device produces e?ciency of 40% and aclr1/aclr2 of 41dbc and 56 dbc respectively. in normal cdma or wcdma systems, receiver sensitiv- ity is greatly a?ected by the tx power leakage, thus the transmit o? power is of great importance. figure 9 shows transmit o? power of -83dbm which results in 107dbc of dynamic range. figure 10. aclr vs. pout at 2015 mhz. figure 11. pae vs. pout at 2015 mhz. figure 12. gain vs. pout at 2015 mhz. -70 -60 -50 -40 -30 -20 -10 0 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 pout (dbm) aclr (db) 2015 mhz aclr1 2015 mhz aclr2 0 10 20 30 40 50 60 024681012141618202224262830 pout (dbm) pae (%) 2015 mhz 15 17 19 21 23 25 27 29 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 pout (dbm) gain (db) 2015 mhz
for product information and a complete list of distributors, please go to our web site: www.avagotech.com avago, avago technologies, and the a logo are trademarks of avago technologies in the united states and other countries. data subject to change. copyright ? 2005-2009 avago technologies. all rights reserved. obsoletes av01-0319en av02-2217en - november 24, 2009 summary avago technologies acpm-7886 has demonstrated excel- lent performance in the emerging chinese td-scdma standard. in addition, acpm-7886 has a proven track record for great results in the umts2100 under wcdma modulation with or without hsdpa. this makes acpm- 7886 ideal for a dual mode/dual band system for the chinese market. references [1] td-scdma: the solution for tdd band, di-giuseppe, principato, fodor, siemens white paper 2002 [2] 29 oct.-nov. 2005 http://www.agilent.com/?nd/sig- nalstudio.

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